The Blackfin processors featured in this presentation are the BF536 and BF537 which are ideally suited for networked applications. These features, and a block diagram of the core processor are shown here. All Blackfin Processors include a high performance 16-/32-bit embedded processor core with a 10-stage RISC MCU/DSP pipeline, variable length ISA for optimal code density, and full SIMD support with instructions for accelerated video and multimedia processing. The ADSP-BF536/ADSP-BF537 processors integrate a fully compliant IEEE 802.3-2002 standard 10/100 Ethernet MAC that has been enhanced with advanced features to allow for higher network bandwidth capabilities. In addition, the DMA subsystem features greater traffic management abilities to allow for higher data throughput with minimal processor core intervention. The ADSP-BF536/ADSP-BF537 processors also embed a Controller Area Network (CAN) module and are capable of data rates up to 1 Mbps. In addition to the embedded connectivity of the Ethernet and CAN modules, the ADSP-BF536/ADSP-BF537 processors include a variety of general purpose functions designed to minimize external IC count and offer broad control and communication. Peripherals include an SPI®-compatible port, dual UARTs, dual SPORT ports, eight multifunction timers, 48 general-purpose I/Os, Two-Wire Interface for I2C operation, a real-time clock, a watchdog timer, an event controller, and a JTAG/debug interface. The flexible Parallel Peripheral Interface (PPI) offers a direct connection to a variety of video encoders/ decoders, display drivers, image sensors, and general-purpose converters.