STM32WB15/STM32WB10 Bluetooth® LE 5.2 Focused MCU

STMicroelectronics' STM32WB15CC 320 Kbyte Flash memory, 48-Kbyte SRAM comes in a VFQFPN48 package ultra-low-power wireless microcontroller and features dual-core 32‑bit (Arm® Cortex®-M4 and dedicated M0+ CPU for real-time radio layer) and a 2.4 GHz RF transceiver supporting Bluetooth® specification v5.2.

• Includes ST state-of-the-art patented technology
• Radio
  • 2.4 GHz
  • RF transceiver supporting Bluetooth 5.2 specification
  • RX sensitivity: -95.5 dBm [Bluetooth Low Energy (BLE) at 1 Mbps]
  • Programmable output power up to +5.5 dBm with 1 dB steps
  • Integrated balun to reduce BOM
  • Support for 2 Mbps
  • Dedicated Arm 32-bit Cortex M0+ CPU for real-time radio layer
  • Accurate RSSI to enable power control
  • Suitable for systems requiring compliance with radio frequency regulations ETSI EN 300 328, EN 300 440, FCC CFR47 Part 15, and ARIB STD-T66
  • Support for external PA
  • Available integrated passive device (IPD) companion chip for optimized matching solution (MLPF-WB-01E3)
• Ultra-low-power platform
  • 1.71 V to 3.6 V power supply
  • -40°C to +85°C/+105°C temperature ranges
  • 12 nA shutdown mode
  • 610 nA standby mode + RTC + 48 KB RAM
  • Active-mode MCU: 33 µA/MHz when RF and SMPS on
  • Radio: Rx 4.5 mA / Tx at 0 dBm 5.2 mA
• Core: Arm 32-bit Cortex-M4 CPU with FPU, adaptive real-time (ART) accelerator allowing 0-wait-state execution from Flash memory, frequency up to 64 MHz, MPU, 80 DMIPS, and DSP instructions
• Performance benchmark
  • 1.25 DMIPS/MHz (Drystone 2.1)
• Supply and reset management
  • High-efficiency embedded SMPS step-down converter with intelligent bypass mode
  • Ultra-safe, low-power brownout reset (BOR) with five selectable thresholds
  • Ultra-low-power POR/PDR
  • Programmable voltage detector (PVD)
  • V_BAT mode with RTC and backup registers
• Clock sources
  • 32 MHz crystal oscillator with integrated trimming capacitors (radio and CPU clock)
  • 32 kHz crystal oscillator for RTC (LSE)
  • Internal low-power 32 kHz RC (LSI1)
  • Internal low-drift 32 kHz RC (LSI2)
  • Internal multispeed 100 kHz to 48 MHz oscillator, factory-trimmed
  • High-speed internal 16 MHz factory-trimmed RC
  • 1x PLL for system clock and ADC
• Memories
  • 320 KB Flash memory with sector protection (PCROP) against R/W operations, enabling radio stack and application
  • 48 KB SRAM, including 36 KB with hardware parity check
  • 20x32-bit backup register
  • Boot loader supporting USART, SPI, I²C interfaces
  • 1 Kbyte (128 double words) OTP